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Searching titles and descriptions for “SoC DFT Engineer”. A match may be a passing mention rather than the job itself. Titles only.
271 roles across 413 listings · show every listing · page 1 of 11
4moSoC DFT Engineer…As a DFT engineer we are involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of…
8dSoC DFT Engineer, CloudGoogleSunnyvale, CA, USA…test strategies, DFT/DFD architecture, and create DFT and Debug specifications for next generation SoCs. In partnership with the Silicon Engineering team, you will…
- 15dSenior SOC DFT Engineer, Google CloudGoogleTel Aviv, Israel; Haifa, Israel
16dASIC/SOC DFT Engineer (Silicon Engineering)…ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s…
- 4moSoC DFT DV Engineer
…test engineers to bring up test patterns on silicon. Bachelors Degree + 0 Years of Experience. Proven experience in large processors and/or SOC designs…
- 1dCPU Cache Subsystem Senior Design ManagerGoogleAustin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA
…into target SOCs. You will lead and manage a front-end design team, collaborate with members of architecture, software, verification, power, DFT, physical design…
2dSenior Debug Tools Engineer…SoCs. Develop and enhance debug workflows leveraging OpenOCD, Lauterbach TRACE32, JTAG/DAP infrastructure, and related run-control technologies to improve debug efficiency and engineering…
- 2dPhysical Design EngineerGoogleTel Aviv, Israel; Haifa, Israel
…Bachelor’s degree in Electrical Engineering or equivalent practical experience. 4 years of experience with System on a Chip (SoC) cycles. Experience with advanced…
- 2dPower Delivery Design Engineer, Google CloudGoogleTel Aviv, Israel; Haifa, Israel
…In this role, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. You will solve technical problems with innovative…
3dSr. Manager - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning…off activities (ir/em, physical verification, DFT) - Master's degree or Ph.D. degree in Electrical Engineering or related field - Experience in RTL coding…
- 3dSr. Manager, Physical Design Engineering, Annapurna Labs
…Drive cross-functional alignment with RTL, DFT, STA, Package, and Validation teams. - 5+ years people management leading PD teams of 8+ engineers, including hiring…
- 3dNVIDIA 2027 New College Graduate: Hardware ASIC Engineering - China
…including multimedia IP) Custom SoC Design and Verification Networking Chip Design and Verification Architectural Power and Energy-Efficiency Modeling DFT Formal Verification Post-Silicon…
3dSenior Digital Test Engineer…Silicon on Chip (SOC) products. The position offers growth/specialization opportunities within Digital Test Engineering: IP: Microprocessors, HSIO, Logic, Memory, DFT/DFM: Yield Management…
- 3dSilicon Debug Engineer
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s…
3dSenior Test Firmware Engineer, Electrical Test…Support Design Engineer with DFT, provide feedback from test results to improve quality and test coverage. Support manufacture test bring-up and yield. Provide…
- 4dSr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning
…Custom SoCs (System on Chip) live at the heart of Amazon Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration…
4dPrincipal DFT Engineer…Define & implement block-level and SoC-level DFT architecture for large, hierarchical SoCs Develop and maintain ATPG flows for stuck-at, at-speed and…
- 4dDesign Verification Engineer
…About the role SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art…
- 4dSenior Low Observables Technician
…Interpret and work from engineering drawings, process specifications, work instructions, and MIL-spec documents. Maintain detailed process documentation including batch records, environmental logs, inspection…
- 4dPrincipal Product EngineerMicrosoftSilicon EngineeringAustin, TX; Redmond, WA; Hillsboro, OR; Mountain View, CA+1 more listingoldest open 19 days
…Drive ATE test program implementation to optimize for SOC power/TDP. Work closely with platform/system engineers to drive necessary correlation work to enable…
- 5dCPU Design Methodology Engineer
…The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and…
- 5dPrincipal Subsystem Design Manager
…Experience with design quality and static checks, DFT implementation and hand off to physical design. #SCHIE Silicon Engineering M5 - The typical base pay range…
- 5dSenior Physical Design EngineerMicrosoftSilicon EngineeringRaleigh, NC; Austin, TX; Redmond, WA; Hillsboro, OR; Mountain View, CA+3 more listingsoldest open 24 days
…Drive methodology exploration activities to optimize SOC blocks for clock construction and related methodology. Coordinate with CAD, RTL/Design teams/DFT, Architecture team, Power…
- 6dHiring Event for PDTE
…Product Development and Test Engineering (PDTE) plays a critical role in bringing Qualcomm’s digital SoC and chiplet products from early silicon through high…
- 6dASIC Engineer, Design for Test
…Science, Computer Engineering, relevant technical field, or equivalent practical experience 6+ years of experience in DFT engineering for complex ASIC or SoC designs, including…