…and characterization memory interface • Develop and execute test plans to validate signal and power integrity • Work with product engineering and system engineering to debug…

…Design for Test, Signal/Power Integrity, Packaging, Physical Design,Software, Silicon Validation, Silicon Engineering) to plan and execute throughout the development cycle. Interface with…

…Experience with high speed digital interfaces and controlled impedance routing requirements like USB, PCIe, Ethernet, SERDES, and DDR memory. Eligible to obtain and maintain…

…silicon platforms, identifying and root-causing functional failures, timing violations, and signal integrity issues Collaborate with RTL design and physical design teams to translate…

…Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the…

…This is a hands-on role for an engineer with deep expertise in high-speed interfaces and hardware debug, who can operate in ambiguity…

…subsystem sizing and partitioning across interfaces, accelerators, DSPs, and software Collaborate with Silicon Engineering, Software Engineering, Hardware Engineering, and Firmware teams from concept through…

…Background in digital signal processing. Understanding of SoC integration constraints and multi-chip RF architectures. Ph.D. in Electrical Engineering or equivalent. The minimum…

…Background in digital signal processing. Understanding of SoC integration constraints and multi-chip RF architectures. Ph.D. in Electrical Engineering or equivalent.

…We are seeking a Signal and Power Integrity engineer with strong capabilities in SI/PI aspects of architectural direction and product development. The candidate…

…SOC interface parametric measurements, basic SW integrated functional tests, Silicon validation, HW PCB design, High speed peripheral expertise, Signal Integrity and Power Integrity, System…

…paths Experience with DFT architecture for high-speed SerDes interfaces, mixed-signal IP, or hierarchical test integration in large multi-die or chiplet designs

…subsystem sizing and partitioning across interfaces, accelerators, DSPs, and software Collaborate with Silicon Engineering, Software Engineering, Hardware Engineering, and Firmware teams from concept through…

…quantized paths — implemented against novel architectural features (matrix engines, on-chip reduction fabrics, software-managed memory hierarchies) and tuned until the remaining gap to…

…Electrical model extraction and signal and power integrity simulations will constitute the majority of the tasks. This engineer must interface with a variety of…

…Engineering Group, Engineering Group > Packaging Engineering General Summary: This role represents an individual contributor within the CHS Signal Integrity organization responsible for end-to…

…As a Signal Integrity Engineer on Starlink’s Payload Engineering team, you’ll have SI ownership throughout the entire life-cycle of the portfolio…

…package interface. - Contribute to cross-level layout co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers. - Assist in…

…Engineering Group, Engineering Group > Hardware Engineering General Summary: Title - Staff Signal Integrity Engineer This role represents individual contributor within the CHS Signal Integrity organization…

…As our DRAM Design Validation Engineer, you will be ensuring the successful integration of DRAM memories with SoC devices, partnering with cross-functional teams…

…The ideal candidate is a high-speed interfaces architect with deep expertise across PCIe, CXL, Universal Chiplet Interconnect Express (UCIe), Non-Volatile Memory Express…

…design considerations, including signal integrity, reach, power, latency, and platform tradeoffs. Ability to work with customers, product management, architecture, and engineering teams to gather…

…As a Chip Package Signal integrity/Power Integrity (SI/PI) Engineer in the chip implementation team, you will be responsible for the chip package…

…memory Optimize reasoning and encoder architectures for Apple silicon, including Neural Engine, GPU, and ANE-aware design patterns; profile and iterate on latency, memory…

…for test Analog and mixed-signal Technology and foundry CAD and design infrastructure Packaging, signal integrity, and power integrity This is a role for…