…Key Responsibilities - Define and drive formal verification strategy across the ASIC DV team for complex IP blocks, interface subsystems, and SoC integration logic. - Develop…

…The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including…

…drive root cause, not just reproduction Verify functional and performance behavior Advance DV methodology beyond your own area: reusable infrastructure, verification IP integration, and…

…formal verification strategy, develop scalable verification environments, create assertions and properties, perform architectural and RTL verification, and collaborate closely with architects, designers, and DV…

…Assertion-Based Verification (ABV), Formal Verification, GPU or processor Verification or Validation Debugging (Verdi, DVE, Questa) and Simulation Tools, Formal Verification (JasperGold or Cadence…

…In this position you will be expected to plan and implement IP/Cluster/Formal verification flows for the Infra IPs. Also expected to coordinate…

…o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test…

…low power verification • Contribute to verification activities across simulation and emulation platforms • Work on creating the automation scripts to support DV methodologies • Create infrastructure…

…Portable Stimulus (PSS) , Formal Verification , Emulation platforms (Veloce/Palladium/ ZeBu ) , Power-aware verification Understanding of machine learning and Generative AI concepts. Knowledge of LLMs…

…In this position you will be expected to plan and implement IP/Cluster/Formal verification flows for the Infra IPs. Also expected to coordinate…

…Experience with formal verification, low-power verification, performance verification, or subsystem-level verification. Experience with security-oriented silicon subsystems, including crypto engines, memory protection…

…development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal opportunity employer and does not…

…Involve in developing automation to improve verification efficiency. Qualifications: Minimum 3 years of DV experience using uvm/assertion based verification technologies Experience in verifying…

…such as Verification, Physical Design, and Design-for-Test. Drive IP/sub-system micro-architecture and RTL design in collaboration with DV and PD…

…teams on clock programming sequences, DVFS, and low-power/clock-shutdown flows Driving design quality: lint, CDC/RDC, formal checks, synthesis QoR, connectivity and…

…Design Verification on clocking testplans, functional and gate-level debug, and coverage closure Supporting Software and firmware teams on clock programming sequences, DVFS, and…

…Verification Plan development , Coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals. Explore innovative DV methodologies (formal, simulation…

…Degree must be completed prior to joining Meta 2+ years of experience in static verification tools Experience with Lint, Clock Domain & Reset Domain crossing…

…robust testbench, optimized for the specific feature/DUT Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency…

…worked on Digital flows/methodologies development in the DV domains like Simulation, Emulation and Formal verification. Experience with CI/CD platform (like Airflow and…

…low power verification • Contribute to verification activities across simulation and emulation platforms • Work on creating the automation scripts to support DV methodologies • Create infrastructure…

…o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test…

…Exposure to Gate-Level Simulation (GLS) including timing and SDF-based verification. Familiarity with formal verification, emulation, or performance verification. Experience with industry-standard…

…Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug Working knowledge of Lint, CDC, PLDRC, CLP…

…Collaborate with worldwide architecture, design, and systems teams to achieve verification goals. Review and refine formal setups, proofs, constraints, and abstractions with design/DV…