…IPs following architectural parameters, physical constraints, DFT logic and power intent. As a GPU Design Integration Engineer, you will be responsible for: - RTL integration…

…Engineering Group, Engineering Group > Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for…

…We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. As…

…The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon…

…As a DFT Verification engineer your primary responsibilities will include: • Reviewing Architecture and Design Specifications • Extracting design features and developing attributes and verification plans…

…As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC Timing: Full chip and block level timing closure/constraints ownership…

…talented engineers to join our STA team. In this role, you will be working closely with multiple integration teams, like DFT, Top Level PNR…

…to ensure consistency and scalability across multiple product generations. - Partner closely with electrical, mechanical, RF, and manufacturing engineers to resolve trade-offs and deliver…

…achieve design targets and specifications. - Integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing - Analyze design, microarchitecture or…

…Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next…

…architects, ASIC designers and verification engineers to verify high frequency clock structures. Be able to engage with multiple teams and design the GPU clock…

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary…

…in Electrical Engineering or related field with 20+ years of experience in SerDes IP validation, AMS circuit design, or silicon/system-level debug. Hands…

…Engineering Group, Engineering Group > Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for…

…at multiple complex designs in deep sub-micron technology nodes Minimum Qualifications: • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related…

…such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self-drive to explore is required. Our engineers enjoy unusually high…

…Key job responsibilities - integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing - As a key member of the…

…Design Engineer working on LEO Phased Array and RF Front-Ends, you will design, integrate, and characterize antennas and arrays across multiple domains (phased…

…Engineer supporting the development, test, and design of antenna and RF Front-End, you will design, integrate, and characterize antennas and arrays across multiple…

…Ability to collaborate and work with multiple groups. Prior experience in implementing Test plans for pre-silicon platforms. Understanding of DFT/IST is optional…

…Exposure to RTL to GDSII flow and advanced chip design tools (Virtuoso, Synthesis, DFT, Power Analysis). Minimum Qualifications: • Bachelor's degree in Science, Engineering…

…Bachelor’s or master’s degree in electrical engineering, Computer Science/Software Engineering, or equivalent with 5+ years of working experience, or a PhD…

…performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical…

…Guiding architecture tradeoff decisions at an executive level. Familiarity with DFT, DFM, and DFR principles. Understanding of performance modeling, including power/performance budgeting & simulation…

…to optimal solutions Collaborate effectively with IP teams spanning multiple sites Familiarity with DFT insertion Familiarity with reset domain, multi-clock domain, multi-power…