…Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience…

…OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR…

…Manufacturing Software Systems (MSS) is seeking a Senior Software Development Engineer who will lead the design, architecture, and delivery of Manufacturing Execution System (MES…

…We are now looking for a Senior Platform Engineer, Design Automation. You will join a small team that builds and operates the software platform…

NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers…

…Work closely with Package and PCB Design teams crafting solutions for system SI/PI performance. Work with Application Engineering supporting customer board designs. TDR…

…the design can still change. We are hiring an experienced kernel and performance engineer to take on this role at a senior level. You…

…expand our Physical Design Engineer team in US with immediate hiring of a few senior and principal level Physical Design engineers to work on…

…As an Antenna & RF Engineer supporting the development, test, and design of antenna and RF Front-End, you will design, integrate, and characterize antennas…

…We are looking for a Senior ASIC Design Engineer to join our Chip Design team and take ownership of Power Management IP — from micro…

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the…

NVIDIA is currently seeking a highly motivated Senior DevTech Compute Engineer for Compression and Data Processing! Would you enjoy prototyping and developing ground breaking…

…OR PhD in Science, Engineering, or a related field and 6+ years of ASIC design, DFT, silicon diagnostics, product engineering, test engineering, Design for…

…As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF…

…OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR…

…Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the digital architecture, design, Verilog RTL…

…In this role, you will be a senior technical contributor responsible for designing and building developer tools that help engineers debug, profile, measure, and…

…BSc or MSc in Electrical Engineering or equivalent experience. 8+ years of experience in Chip design, System and HW. Deep understanding of how to…

…Acts as a strong contributor at design reviews and project meetings. Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering…

…Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the architecting, designing, implementing, verifying…

…As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development…

…As Physical Design Engineer, you will collaborate closely with the functional design, Design For Testing (DFT), architecture, and packaging engineers. Additionally, you'll solve…

…ASICs. In this role, you will execute package layout tasks from floor planning through tape out and manufacturing release, working closely with senior engineers…

…Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the high-speed digital design, baseband…

…Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the Physical Design Flow of high…