…We are looking for a Senior Fabric Design Verification engineer for customer focused solutions, insight and industry knowledge to envision and implement future technical…

…Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably…

…timing and physical verification) - Experience in advanced nodes technologies and Implementation tools - Process and technology oriented - Leadership and mentoring skills - Full-chip experience (floor…

…We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for…

…You will collaborate with leading physicists, quantum theorists, quantum experimentalists, research engineers, systems engineers, technical program managers, supply chain experts, cloud architects, and external…

…Working in close partnership with circuit designers, digital designers and layout engineers, you will translate circuit intent into physical constraints, drive synthesis, place-and…

…of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification…

…physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs. Work closely with block owners, full Chip…

…physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs. Work closely with block owners, full Chip…

…Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit…

…You will have full ownership of challenging problems, working with a team of enthusiastic engineers to design and produce solutions that enable SpaceX to…

…We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink’s System-on-Chip…

…Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably…

…of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience - 7+ years of digital design in communication…

…You will lead and drive physical design implementation for complex, large-scale retimer-class and full-reticle ASIC products in advanced technology nodes. This…

…About the Role We are seeking a hands-on Rack-level Manufacturing Test Engineer to design, develop, implement test strategies and optimize for fully…

…Must be enrolled in a bachelor’s degree or graduate program 3+ months of software development, hardware engineering, or chip design/development experience Applicant…

…Must be enrolled in a bachelor’s degree or graduate program 3+ months of software development, hardware engineering, or chip design/development experience Applicant…

…Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams…

…As a Static Timing Engineer on the chip implementation team, you will work on the physical implementation of ASICs using advanced technology nodes. You…

ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis…

…and physical design teams . You will drive timing analysis and closure for complex, multi‑GHz CPU designs across block, cluster, and full‑chip hierarchies…

…Analyze design bottlenecks and QoR regressions, collaborating with RTL, timing, architecture, and physical design teams to resolve them. Support physical implementation from floorplanning and…

…What You’ll Do Lead full-chip and block-level IR drop and electromigration (EM) analysis for advanced-node SoC designs Drive power integrity…

…Execution Plans; Define and implement execution plans in collaboration with cross-discipline leaders in unit level, full-chip, physical design, and firmware/software emulation…