…engineers to review test plans, coverage results, and debug functional failures at the block and chip level Partner with physical design and implementation teams…

…Experience in advanced technology node designs and full-chip/block-level physical implementation is highly desirable. Demonstrated experience in floorplan convergence, congestion closure, timing…

…subsystems in Ethernet switch ASICs, driving architecture-aligned implementation and optimization. Own micro-architecture and RTL design of networking blocks (e.g., forwarding engine…

…and physical design teams to deliver high‑quality silicon on aggressive schedules. The responsibilities include the following Timing Analysis: Drive subsystem-level STA and…

…RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help…

…As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development…

…You'll work alongside construction veterans and world-class engineers to solve physical-world problems that simulations can't touch. If you're ready…

…block-level implementation. As a CPU Implementation Engineer, you will own or participate in the following: • Work with Micro-architects to define memory subsystem…

…About the Role As a Senior Physical Design Engineer, you will take ownership of block-level and subsystem-level physical implementation, driving timing closure…

…Work on Linux kernel components including storage drivers, filesystem modules, block drivers, and memory subsystems. Optimize storage and memory performance for runtime efficiency and…

…Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design…

…level requirements, owns significant RF subsystems or end‑to‑end hardware blocks Design, integrate, and optimize RF hardware circuits and subsystems, makes design tradeoffs…

…You will lead a team of propulsion systems engineers through Varda's evolving vehicle designs and block upgrades, with your work directly shaping the…

…ASIC Design Engineer/Level I: $125,000.00 - $145,000.00/per year ASIC Design Engineer/Level II: $145,000.00 - $195,000.00…

…As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development…

…Skills and Qualifications: - 7+ years of physical design/verification experience. - Strong experience in block/subsystem timing closure. - Strong ability to learn and grow with…

…Master’s or PhD in Physics, Electrical Engineering, Optical Engineering, or a closely related discipline - Experience with electrical design and optical communication systems - Familiarity…

…develop implementation tools and methodologies for PPA, Quality and shortening design cycle time, in close collaboration with Snapdragon Implementation and Physical Design teams. Qualcomm…

…You will have hands on experience in physical design and large chip integration. As a GPU Top Level Physical Design engineer, you will collaborate…

…Lead the architecture and layout design of key memory subsystems, including control logic, sense amplifiers, I/O blocks, bit-cell arrays, and decoders for…

…You will have hands on experience in physical design and large chip integration. Join us! As a GPU Top Level Physical Design engineer, you…

…between NVLink C2C blocks and the rest of the chip Architectural modeling, validation, definition and documentation Driving implementation across design, verification, firmware and software…

…You will collaborate with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations. The ML…

…given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness. Experience in leading a small team of Verification engineers performing…

…guides lower-level engineers; proposes minor improvements. Independently identifies problems across multiple systems or subsystems and resolves most architecture and design issues; collaborates and…