…and creative senior design engineers to be part of a team working on the design of state of the art memory sub-system components…

…and creative senior design engineers to be part of a team working on the design of state of the art memory sub-system components…

…We're looking for a talented, motivated Senior Design Verification Engineer to join our GPU memory subsystem team in Durham, NC. Looking to join…

…Modeling and Firmware Enablement Design and develop SystemC/TLM-2.0 models for complex SoC subsystems including PCIe, memory, boot infrastructure, compute clusters, interconnect…

…As a Software Engineer specializing in memory bring-up, you will lead the post-silicon enablement and optimization of high-speed memory subsystems (such…

…About the team About the role The RTL design team builds the compute datapath, on-chip network, and memory subsystems inside SambaNova's RDU…

…The position offers growth/specialization opportunities within Digital Test Engineering: IP: Microprocessors, HSIO, Logic, Memory, DFT/DFM: Yield Management, Diagnostics, Test Time, etc. AI…

…engineering teams across the organization depend on daily. Design and build Kubernetes-native services, controllers and APIs in Go, owning each subsystem from design…

…About the team The RTL design team builds the compute datapath, on-chip network, and memory subsystems inside SambaNova's RDU AI accelerator. Their…

…ASIC design verification 5+ years managing design verification engineers, including hiring and performance management, with experience leading senior and principal-level engineers Track record…

…design or architecture (design patterns, reliability and scaling) of new and existing systems experience - Experience as a mentor, tech lead or leading an engineering…

…design or architecture (design patterns, reliability and scaling) of new and existing systems experience - Experience as a mentor, tech lead or leading an engineering…

…About the Job As a Senior Linux Systems Engineer on Keeper’s PAM team, you will design and build security-sensitive components that control…

…About the role SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration…

…Guide the engineering teams throughout the implementation. Translate threat models into actionable security requirements and architectural decisions, and review designs and implementations against them…

…About the team The RTL design team builds the compute datapath, on-chip network, and memory subsystems inside SambaNova's RDU AI accelerator. Their…

…in ASIC design verification Depth in high-speed I/O verification: protocol-level verification of PCIe or Ethernet, and memory subsystems such as HBM…

…and subsystems using logs, traces, telemetry, and targeted experiments, working with senior engineers on problems that span multiple systems. Participate in design and code…

…Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance…

…Building these devices requires close collaboration between hardware engineers, software engineers, designers, and manufacturing partners, all with a shared focus on creating industry-defining…

We are seeking a Senior Software Development Engineer to build and scale the software systems that power perception and state estimation on our intelligent…

…memory management, scheduler, networking, storage, and GPU-related subsystems - Design and implement advanced virtualization technologies tailored for GPU-accelerated AI and HPC workloads. You…

…of networking or security protocols, memory safety, and concurrency primitives. Ability to independently plan, design, and deliver engineering components in an ambiguous environment. Preferred…

…The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art…

…late materialization, memory management and spilling, parallel algorithms, collectives and compression and quantization. Read more from the team: Designing GPU Query Engines , Cut Checkpoints…