Jobs

Indexed directly from employers. Every age is their own publish date.

Jobs

Indexed directly from employers. Every age is their own publish date.

fable12 is not a job board. It is a record of how long each listing has actually been open, read straight from employers’ own hiring systems. Listings link to the employer; ages are the employer’s own publish date — how we know.

Not affiliated with any company listed. Boards last swept 23 Aug, 12:21 UTC.

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Jobs

Indexed directly from employers. Every age is their own publish date.

Search jobs

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Under a week0 1–4 weeks9 1–2 months20 2–12 months37 Over a year6

2,712 postings mention “Chip Design Engineer” in the description

72 roles · group by role · page 2 of 3

Sort

9mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
10mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
12mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
12mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
1.4y
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
2y
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
9d
Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
14d
Senior Chip Design Dynamic Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Dynamic Verification Engineer at NVIDIA — opens NVIDIA’s own board
19d
Principal Signal & Power Engineer (Die to Die and Chiplet Design)
MicrosoftSilicon EngineeringRaleigh, NC; Redmond, WA; Mountain View, CA; Austin, TX; Hillsboro, OR
Apply Principal Signal & Power Engineer (Die to Die and Chiplet Design) at Microsoft — opens Microsoft’s own board
25d
Principal Engineer, Project Management - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Principal Engineer, Project Management - Chip Design at NVIDIA — opens NVIDIA’s own board
27d
Senior Chip Design and Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design and Verification Engineer at NVIDIA — opens NVIDIA’s own board
31d
Physical Design Engineer - Full Chip Implementation
EtchedASICSan Jose
Apply Physical Design Engineer - Full Chip Implementation at Etched — opens Etched’s own board
33d
Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
GoogleSunnyvale, CA, USA
Apply Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects at Google — opens Google’s own board
33d
Applied Research Engineer, Chip Design
NVIDIAResearch Staff MemberSanta Clara, CA
Apply Applied Research Engineer, Chip Design at NVIDIA — opens NVIDIA’s own board
39d
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICב"ש, South District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
40d
Senior DevOps Software Engineer - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; Yokne'am Illit, North District
Apply Senior DevOps Software Engineer - Chip Design at NVIDIA — opens NVIDIA’s own board
40d
Research Engineer, Chip Design RL (Reinforcement Learning)
AnthropicAI Research & EngineeringSan Francisco, CA | New York City, NY
Apply Research Engineer, Chip Design RL (Reinforcement Learning) at Anthropic — opens Anthropic’s own board
44d
Senior ASIC Engineer, Infra and Workflow - Networking Chip Design
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior ASIC Engineer, Infra and Workflow - Networking Chip Design at NVIDIA — opens NVIDIA’s own board
45d
Senior ASIC Verification Engineer - Networking Chip Design
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior ASIC Verification Engineer - Networking Chip Design at NVIDIA — opens NVIDIA’s own board
56d
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
3mo
Senior Chip Design Verification Engineer, Port IP Group
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer, Port IP Group at NVIDIA — opens NVIDIA’s own board
3mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; ב"ש, South District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
3mo
Senior Applied AI and AI Infrastructure Engineer - Chip Design and DFX
NVIDIAData ScientistSanta Clara, CA
Apply Senior Applied AI and AI Infrastructure Engineer - Chip Design and DFX at NVIDIA — opens NVIDIA’s own board
4mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
4mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District; Tel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board

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Search jobs

Company

▾

Job function

▾

Level

▾

Country

▾

Workplace

▾

Age

▾

Under a week0 1–4 weeks9 1–2 months20 2–12 months37 Over a year6

2,712 postings mention “Chip Design Engineer” in the description

72 roles · group by role · page 2 of 3

Sort

9mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
10mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
12mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
12mo
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
1.4y
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
2y
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv Districthalf of NVIDIA’s roles are under 3 months
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
9d
Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
14d
Senior Chip Design Dynamic Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Dynamic Verification Engineer at NVIDIA — opens NVIDIA’s own board
19d
Principal Signal & Power Engineer (Die to Die and Chiplet Design)
MicrosoftSilicon EngineeringRaleigh, NC; Redmond, WA; Mountain View, CA; Austin, TX; Hillsboro, OR
Apply Principal Signal & Power Engineer (Die to Die and Chiplet Design) at Microsoft — opens Microsoft’s own board
25d
Principal Engineer, Project Management - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Principal Engineer, Project Management - Chip Design at NVIDIA — opens NVIDIA’s own board
27d
Senior Chip Design and Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design and Verification Engineer at NVIDIA — opens NVIDIA’s own board
31d
Physical Design Engineer - Full Chip Implementation
EtchedASICSan Jose
Apply Physical Design Engineer - Full Chip Implementation at Etched — opens Etched’s own board
33d
Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
GoogleSunnyvale, CA, USA
Apply Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects at Google — opens Google’s own board
33d
Applied Research Engineer, Chip Design
NVIDIAResearch Staff MemberSanta Clara, CA
Apply Applied Research Engineer, Chip Design at NVIDIA — opens NVIDIA’s own board
39d
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICב"ש, South District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
40d
Senior DevOps Software Engineer - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; Yokne'am Illit, North District
Apply Senior DevOps Software Engineer - Chip Design at NVIDIA — opens NVIDIA’s own board
40d
Research Engineer, Chip Design RL (Reinforcement Learning)
AnthropicAI Research & EngineeringSan Francisco, CA | New York City, NY
Apply Research Engineer, Chip Design RL (Reinforcement Learning) at Anthropic — opens Anthropic’s own board
44d
Senior ASIC Engineer, Infra and Workflow - Networking Chip Design
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior ASIC Engineer, Infra and Workflow - Networking Chip Design at NVIDIA — opens NVIDIA’s own board
45d
Senior ASIC Verification Engineer - Networking Chip Design
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior ASIC Verification Engineer - Networking Chip Design at NVIDIA — opens NVIDIA’s own board
56d
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
3mo
Senior Chip Design Verification Engineer, Port IP Group
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer, Port IP Group at NVIDIA — opens NVIDIA’s own board
3mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; ב"ש, South District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
3mo
Senior Applied AI and AI Infrastructure Engineer - Chip Design and DFX
NVIDIAData ScientistSanta Clara, CA
Apply Senior Applied AI and AI Infrastructure Engineer - Chip Design and DFX at NVIDIA — opens NVIDIA’s own board
4mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board
4mo
Senior Chip Design Verification Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District; Tel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Verification Engineer at NVIDIA — opens NVIDIA’s own board

← Previous Next →