…subsystems Memory systems (DDR, cache, interconnect) Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification…

…Power schemes, DMA, DDR, PCIe, Memory Controller Subsystems, USB, PLL, power up, Secured Boot schemes Deliver on Power Management designs using low-power methodologies…

…in Electrical Engineering / Computer Engineering / Computer Science 10+ years of experience Strong background in CPU/SoC architecture Deep knowledge of cache, memory, and interconnect…

…years of experience in cpu/memory architecture and subsystem design - Master's degree in electrical engineering, computer engineering, or equivalent - 5+ year of experience…

…DDR, CACHE, SOC Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or…

…Memory NoCs based Subsystem Design Team is looking for a Senior ASIC Design Engineers for the next generation high speed HBM/LPDDR/DDR memory…

…interfaces, embedded CPU subsytems, DDR2/DDR3/DDR4 memory design, network processors, I2C, USB - Experience with high-speed PCB design and AC/DC PI and…

…interfaces, embedded CPU subsytems, DDR2/DDR3/DDR4 memory design, network processors, I2C, USB - Experience with high-speed PCB design and AC/DC PI - Recent…

…Experience with DDR4, Aurora, and high-speed transceiver design and verification. Familiarity with AXI Stream and AXI Memory Mapped interfaces. PCB design and schematic…

…Knowledge of NoC architecture and network traffic engineering. Knowledge of Memory Controller, LPDDR & DDR protocols. Experience driving architecture-oriented performance and power investigations on…

…across design blocks and subsystems. - Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to…