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Searching titles and descriptions for “Signal Integrity Engineer - Serial IO Interface”. A match may be a passing mention rather than the job itself. Titles only.
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15dSr. Staff/Principal PCIE Subsystem Architect…flows, and high-speed serial interface behavior. Strong understanding of PCIe Gen6/Gen7 requirements, including FLIT mode, PAM4 signaling implications, link training, latency, error…