Jobs
Indexed directly from employers. Every age is their own publish date.
Indexed directly from employers. Every age is their own publish date.
Indexed directly from employers. Every age is their own publish date.
Searching titles and descriptions for “CAD Engineer - Static Timing Analysis & Physical Design”. A match may be a passing mention rather than the job itself. Titles only.
25 roles
…Analysis, Silicon Instrumentation and Measurement CAD and Physical Design Methodologies (Flow and Tools Development), Chop Floorplan, Power/Clock Distribution, Packaging, P&R and Timing…
…Signal Design, Digital Design, Logic Design CAD and Physical Design Methodologies (Flow and Tools Development), as well as implementation Synthesis, Static Timing Analysis, Clock…
…physical design efficiency and performance · Develop and implement methodologies and strategies to sign off blocks, subsystem/Subchip in the areas of static timing analysis…
…As CPU STA CAD engineer, you will build and support the world’s best analysis tools and flows. Your tools and flows will ensure…
…s degree in engineering, (aerospace, mechanical, mechatronics, or other technical engineering discipline) Expertise in propulsion system modelling, static and transient analysis, and model validation…
…s degree in engineering, (aerospace, mechanical, mechatronics, or other technical engineering discipline) Expertise in propulsion system modelling, static and transient analysis, and model validation…
…leveraging deep expertise in static and dynamic analysis, physical testing, data collection, and signal processing to solve complex engineering challenges. ABOUT THE JOB We…
…leveraging deep expertise in static and dynamic analysis, physical testing, data collection, and signal processing to solve complex engineering challenges. ABOUT THE JOB We…
…Strong mechanical design skills using NX, SolidWorks, or equivalent CAD software. Strong engineering fundamentals including machine design, structural analysis, GD&T, tolerance analysis, hand…
…of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification…
…Design Auditor, Power insertion, or equivalent. Knowledge of UPF and low-power RTL implementation or verification. Experience with SDC, synthesis, static timing analysis, formal…
…Mentor engineers and technicians in fixture design, instrumentation, experimental methods, test execution, and failure analysis. Improve test throughput, repeatability, automation, lab utilization, and failure…
…of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification…
…Physical Design, Backend CAD (Computer-Aided Design), STA (Static Timing Analysis) and Timing closure methodologies. Familiarity with industry-standard tools like PrimeTime (STA) and…
…Physical Design, STA (Static Timing Analysis) and Timing closure methodologies. Familiarity with industry-standard tools like PrimeTime (STA) and PrimePower (Power Estimation). Self-motivation…
…ASIC/SoC Physical Design implementation. Place and Route using Cadence Innovus and/or Synopsys Fusion Compiler. Static Timing Analysis and timing closure using Synopsys…
…timing analysis with silicon test results and driving root-cause resolution. Provide technical leadership and collaborate across Architecture, Design, Verification, Physical Design, CAD, Manufacturing…
…designs with 3D CAD assemblies/components and 2D drawings as deliverables. · Conduct static, dynamic, and modal structural analysis as needed to support design work…
…IR/EM analysis, power integrity, or Physical Design signoff Strong understanding of power integrity concepts including static/dynamic IR drop, EM analysis, and power…
…latest technologies nodes and practices in physical design including Place and Routs (P&R) and Static timing analysis (STA) sign-of Be willing to…
…Physical Design Engineer to join the team. Responsibilities Experience and knowledge on Synthesis, RTL / DFT feedback , Timing Constraints. Responsible for RTL to GDS implementation…
…Power Design Networks PDN-planning Place & Route Clock Tree Synthesis and customization Static Timing Analysis Understand Timing constraints Fixing timing violations Physical Verification DRC…
…clock domain crossing Proficiency with design quality tooling — lint, CDC/RDC, formal verification, synthesis, and static timing analysis (STA) — including the ability to interpret…
…Engineering, relevant technical field, or equivalent practical experience 6+ years of experience in ASIC design or physical design with a focus on power analysis…
…or similar CAD software. Proficiency in engineering analysis software (e.g. ANSYS, FEMAP or similar finite element analysis software) for static/dynamic load modeling…