Jobs

Indexed directly from employers. Every age is their own publish date.

Jobs

Indexed directly from employers. Every age is their own publish date.

fable12 is not a job board. It is a record of how long each listing has actually been open, read straight from employers’ own hiring systems. Listings link to the employer; ages are the employer’s own publish date — how we know.

Not affiliated with any company listed. Boards last swept 23 Aug, 15:21 UTC.

RSS · Open longest · Ghost jobs · Engineering notes · For assistants

Jobs

Indexed directly from employers. Every age is their own publish date.

Search jobs

Company

▾

Job function

▾

Level

▾

Country

▾

Workplace

▾

Age

▾

Under a week8 1–4 weeks85 1–2 months89 2–12 months259 Over a year28

255 postings mention “ASIC Design Engineer” in the description

75 roles across 85 listings · show every listing · page 3 of 3

Sort

17d
Interposer Design Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Interposer Design Engineer at NVIDIA — opens NVIDIA’s own board
17d
Senior Mixed Signal Design Engineer
NVIDIAEngineer, ASIC Mixed Signal DesignSanta Clara, CA
Apply Senior Mixed Signal Design Engineer at NVIDIA — opens NVIDIA’s own board
18d
GPU Design Implementation Engineer
QualcommGPU ASICS EngineeringSan Diego, CA
Apply GPU Design Implementation Engineer at Qualcomm — opens Qualcomm’s own board
19d
Senior SoC Design Engineer
NVIDIAEngineer, ASICBengaluru, KA
Apply Senior SoC Design Engineer at NVIDIA — opens NVIDIA’s own board
19d
DSP Core Design Engineer, Principal
QualcommASICS EngineeringHsinchu, Hsinchu City
Apply DSP Core Design Engineer, Principal at Qualcomm — opens Qualcomm’s own board
19d
Mixed Signal Design Verification Engineer
QualcommASICS EngineeringSan Diego, CA
Apply Mixed Signal Design Verification Engineer at Qualcomm — opens Qualcomm’s own board
19d
Staff Engineer, Physical Design/Implementation
QualcommASICS EngineeringToronto, ON
Apply Staff Engineer, Physical Design/Implementation at Qualcomm — opens Qualcomm’s own board
20d
Senior High Speed SerDes Validation Engineer
NVIDIAEngineer, ASIC Mixed Signal DesignHsinchu, Hsinchu City; Taipei City
Apply Senior High Speed SerDes Validation Engineer at NVIDIA — opens NVIDIA’s own board
20d
Senior Design Verification Engineer - Interconnect IP
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior Design Verification Engineer - Interconnect IP at NVIDIA — opens NVIDIA’s own board
20d
Senior Board Design Engineer, Electro Optical
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Senior Board Design Engineer, Electro Optical at NVIDIA — opens NVIDIA’s own board
20d
Senior VLSI Design Engineer - Hod Hasharon
QualcommASICS EngineeringHaifa, Haifa District
Apply Senior VLSI Design Engineer - Hod Hasharon at Qualcomm — opens Qualcomm’s own board
20d
Engineer, Senior Staff VLSI Design - Hod Hasharon
QualcommASICS EngineeringHaifa, Haifa District
Apply Engineer, Senior Staff VLSI Design - Hod Hasharon at Qualcomm — opens Qualcomm’s own board
23d
Senior CPU Tooling and Design Automation Engineer
NVIDIAEngineer, ASICSanta Clara, CA; Austin, TX
Apply Senior CPU Tooling and Design Automation Engineer at NVIDIA — opens NVIDIA’s own board
24d
Physical Design Engineer - Block Level, Subsystem Implementation
EtchedASICAustin
Apply Physical Design Engineer - Block Level, Subsystem Implementation at Etched — opens Etched’s own board
25d
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
25d
Principal Engineer, Project Management - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Principal Engineer, Project Management - Chip Design at NVIDIA — opens NVIDIA’s own board
25d
Physical Design Engineer - Mixed Signal IP
QualcommASICS EngineeringSan Diego, CA
Apply Physical Design Engineer - Mixed Signal IP at Qualcomm — opens Qualcomm’s own board
26d
CAD Developer, IR, Timing and Physical Design Optimization
NVIDIAEngineer, ASICShanghai, Shanghai
Apply CAD Developer, IR, Timing and Physical Design Optimization at NVIDIA — opens NVIDIA’s own board
26d
SOC Clocks RTL Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; ב"ש, South District; Yokne'am Illit, North District
Apply SOC Clocks RTL Design Engineer at NVIDIA — opens NVIDIA’s own board
26d
Senior SOC Clocks RTL Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; Yokne'am Illit, North District
Apply Senior SOC Clocks RTL Design Engineer at NVIDIA — opens NVIDIA’s own board
26d
Staff/Senior Staff Physical Design Engineer
QualcommASICS EngineeringHo Chi Minh City, Ho Chi Minh City
Apply Staff/Senior Staff Physical Design Engineer at Qualcomm — opens Qualcomm’s own board
26d
Staff Memory Controller Architecture and Design Engineer
QualcommASICS EngineeringSan Diego, CA
Apply Staff Memory Controller Architecture and Design Engineer at Qualcomm — opens Qualcomm’s own board
27d
Senior Chip Design and Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design and Verification Engineer at NVIDIA — opens NVIDIA’s own board
27d
Physical Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District+1 more listingoldest open 3 months
Apply Physical Design Engineer at NVIDIA — opens NVIDIA’s own board
27d
Senior EDA Engineer, SOC Design Methodology
NVIDIAEngineer, ASICSanta Clara, CA
Apply Senior EDA Engineer, SOC Design Methodology at NVIDIA — opens NVIDIA’s own board

← Previous

Search jobs

Company

▾

Job function

▾

Level

▾

Country

▾

Workplace

▾

Age

▾

Under a week8 1–4 weeks85 1–2 months89 2–12 months259 Over a year28

255 postings mention “ASIC Design Engineer” in the description

75 roles across 85 listings · show every listing · page 3 of 3

Sort

17d
Interposer Design Engineer
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Interposer Design Engineer at NVIDIA — opens NVIDIA’s own board
17d
Senior Mixed Signal Design Engineer
NVIDIAEngineer, ASIC Mixed Signal DesignSanta Clara, CA
Apply Senior Mixed Signal Design Engineer at NVIDIA — opens NVIDIA’s own board
18d
GPU Design Implementation Engineer
QualcommGPU ASICS EngineeringSan Diego, CA
Apply GPU Design Implementation Engineer at Qualcomm — opens Qualcomm’s own board
19d
Senior SoC Design Engineer
NVIDIAEngineer, ASICBengaluru, KA
Apply Senior SoC Design Engineer at NVIDIA — opens NVIDIA’s own board
19d
DSP Core Design Engineer, Principal
QualcommASICS EngineeringHsinchu, Hsinchu City
Apply DSP Core Design Engineer, Principal at Qualcomm — opens Qualcomm’s own board
19d
Mixed Signal Design Verification Engineer
QualcommASICS EngineeringSan Diego, CA
Apply Mixed Signal Design Verification Engineer at Qualcomm — opens Qualcomm’s own board
19d
Staff Engineer, Physical Design/Implementation
QualcommASICS EngineeringToronto, ON
Apply Staff Engineer, Physical Design/Implementation at Qualcomm — opens Qualcomm’s own board
20d
Senior High Speed SerDes Validation Engineer
NVIDIAEngineer, ASIC Mixed Signal DesignHsinchu, Hsinchu City; Taipei City
Apply Senior High Speed SerDes Validation Engineer at NVIDIA — opens NVIDIA’s own board
20d
Senior Design Verification Engineer - Interconnect IP
NVIDIAEngineer, ASICShanghai, Shanghai
Apply Senior Design Verification Engineer - Interconnect IP at NVIDIA — opens NVIDIA’s own board
20d
Senior Board Design Engineer, Electro Optical
NVIDIAEngineer, ASICYokne'am Illit, North District
Apply Senior Board Design Engineer, Electro Optical at NVIDIA — opens NVIDIA’s own board
20d
Senior VLSI Design Engineer - Hod Hasharon
QualcommASICS EngineeringHaifa, Haifa District
Apply Senior VLSI Design Engineer - Hod Hasharon at Qualcomm — opens Qualcomm’s own board
20d
Engineer, Senior Staff VLSI Design - Hod Hasharon
QualcommASICS EngineeringHaifa, Haifa District
Apply Engineer, Senior Staff VLSI Design - Hod Hasharon at Qualcomm — opens Qualcomm’s own board
23d
Senior CPU Tooling and Design Automation Engineer
NVIDIAEngineer, ASICSanta Clara, CA; Austin, TX
Apply Senior CPU Tooling and Design Automation Engineer at NVIDIA — opens NVIDIA’s own board
24d
Physical Design Engineer - Block Level, Subsystem Implementation
EtchedASICAustin
Apply Physical Design Engineer - Block Level, Subsystem Implementation at Etched — opens Etched’s own board
25d
Senior Chip Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design Engineer at NVIDIA — opens NVIDIA’s own board
25d
Principal Engineer, Project Management - Chip Design
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Principal Engineer, Project Management - Chip Design at NVIDIA — opens NVIDIA’s own board
25d
Physical Design Engineer - Mixed Signal IP
QualcommASICS EngineeringSan Diego, CA
Apply Physical Design Engineer - Mixed Signal IP at Qualcomm — opens Qualcomm’s own board
26d
CAD Developer, IR, Timing and Physical Design Optimization
NVIDIAEngineer, ASICShanghai, Shanghai
Apply CAD Developer, IR, Timing and Physical Design Optimization at NVIDIA — opens NVIDIA’s own board
26d
SOC Clocks RTL Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; ב"ש, South District; Yokne'am Illit, North District
Apply SOC Clocks RTL Design Engineer at NVIDIA — opens NVIDIA’s own board
26d
Senior SOC Clocks RTL Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District; Yokne'am Illit, North District
Apply Senior SOC Clocks RTL Design Engineer at NVIDIA — opens NVIDIA’s own board
26d
Staff/Senior Staff Physical Design Engineer
QualcommASICS EngineeringHo Chi Minh City, Ho Chi Minh City
Apply Staff/Senior Staff Physical Design Engineer at Qualcomm — opens Qualcomm’s own board
26d
Staff Memory Controller Architecture and Design Engineer
QualcommASICS EngineeringSan Diego, CA
Apply Staff Memory Controller Architecture and Design Engineer at Qualcomm — opens Qualcomm’s own board
27d
Senior Chip Design and Verification Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District
Apply Senior Chip Design and Verification Engineer at NVIDIA — opens NVIDIA’s own board
27d
Physical Design Engineer
NVIDIAEngineer, ASICTel Aviv-Yafo, Tel Aviv District+1 more listingoldest open 3 months
Apply Physical Design Engineer at NVIDIA — opens NVIDIA’s own board
27d
Senior EDA Engineer, SOC Design Methodology
NVIDIAEngineer, ASICSanta Clara, CA
Apply Senior EDA Engineer, SOC Design Methodology at NVIDIA — opens NVIDIA’s own board

← Previous