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Searching titles and descriptions for “Senior ASIC Verification Engineer, Low Power AI Subsystems”. A match may be a passing mention rather than the job itself. Titles only.
4 roles
3dSenior RTL Design Engineer…Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You'll own blocks within a larger subsystem…
- 5dSenior Hardware Design Engineer
…About the role SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration…
- 6dPrincipal Design Verification Engineer
…Engineer to own verification for our next-generation RDU, the reconfigurable dataflow silicon behind our machine learning and AI systems. This is a senior…
6dSensor Subsystem Design Engineer - Engineer OR Senior Level- Cork, Ireland…in subsystem design, low-power methodologies, and industry-standard AMBA protocols. Skills and Experience We Would Love to See Experience in ASIC design and…