…that the RTL design meets targeted performance • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects…

…Design for Test, Signal/Power Integrity, Packaging, Physical Design,Software, Silicon Validation, Silicon Engineering) to plan and execute throughout the development cycle. Interface with…

…4 years of experience with custom silicon design (e.g., SoCs, ASICs, etc.). Experience with RTL design using Verilog or SystemVerilog. Preferred qualifications: Master…

…accurate translation from Golden RTL to the final physical netlist. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a…

…Lead and manage a team of design engineers working on CPU functional units, emphasizing on micro-architecture and RTL design for the next generation…

…design reviews and post ‑ silicon/post ‑ fabrication retros. Embody our Culture and Values Qualifications Required Master's Degree in Physics, Electrical/Computer Engineering, or…

…the RTL, and carrying your blocks through implementation, tape-out, and silicon bring-up. You'll work alongside principal engineers, architects, design verification, and…

…and signal integrity issues Collaborate with RTL design and physical design teams to translate design intent into silicon-level validation coverage plans and corner…

…through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams About the team Utility Computing (UC…

…pass silicon success, and relentless continuous improvement. Key job responsibilities - Build, hire, and develop a physical design team of 10-15 engineers. Own headcount…

…Simulation, Emulation, and Silicon Bring-Up Validate designs across multiple stages—from architectural models and RTL simulation to emulation and real silicon—and debug…

…Engineering, or a related field Course or internship experience related to the following areas could be required: Digital Systems, Digital Design, VLSI Design, RTL…

…s Silicon Engineering Group (SEG) is looking for a hardworking engineer for our CPU Gate Level Synthesis role to assess and optimize design quality…

…a Principal RTL Design Engineer to own the microarchitecture and RTL for our next-generation Reconfigurable Dataflow Unit (RDU), the silicon behind our AI…

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s…

…Partnering closely with ASIC vendors to validate firmware behaviors against RTL and digital logic designs before physical silicon is available. WHAT YOU BRING 5…

…We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate…

…RTL, with embedded assertions and cover points. • Working with physical design teams to optimize timing, area, and power for our designs in silicon. • Ensuring…

…As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure…

…This role is for a digital-focused DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities…

…uArchitecture-RTL Design-Physical Implementation-Timing Closure–Simulation Validation– Lab Based Silicon Validation Collaborate with network communication system architects to define and design/implement…

Annapurna Labs (our organization within Amazon Utility Computing) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve…

…The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art…

…A block stays with the engineer who wrote it through PPA closure, tapeout, and bring-up, so you debug your own design in silicon…

…You will work shoulder to shoulder with the RTL design team to keep the design emulation-compliant, decide where a vendor model will do…