Jobs
Indexed directly from employers. Every age is their own publish date.
Jobs
Indexed directly from employers. Every age is their own publish date.
Searching titles and descriptions for “Senior ASIC Design Engineer – Clocks IP”. A match may be a passing mention rather than the job itself. Titles only.
1 role
1.1yPhysical Design Engineer (Engineer up to Principal Level)QualcommASICS EngineeringSan Diego, CA; Austin, TX; Santa Clara, CAhalf of Qualcomm’s roles are under 3 months…considered for Engineer, Senior Engineer, Staff Engineer, or Principal Engineer opportunities. Physical Design responsibilities include floorplanning, power planning, place and route, clock tree synthesis…