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Searching titles and descriptions for “Design Verification Engineer — Memory Subsystem”. A match may be a passing mention rather than the job itself. Titles only.
6 roles
1yASIC Architect…specifications and interface definitions for compute blocks and subsystems - Collaborate with RTL, verification, physical design, and software teams to ensure architectural feasibility and ultimate…
- 1.2ySenior Verification Engineer, Memory Subsystem
…Responsible for performance and deadlock verification of the GPU memory subsystem unit. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven…
- 1.2yDesign Verification Engineer - Internal IP
…Job Summary We are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom IPs powering our…
- 1.2ySenior ASIC Design Engineer - NOC IP
…creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used…
- 1.2ySenior IP DV Engineer - NOC IP
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of memory subsystem units for the…
2yCPU Microarchitect/RTL Engineer…verification * Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance * Design delivery - work with multifunctional engineering…