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Searching titles and descriptions for “Senior Design Engineer, Coherent High Speed Interconnect”. A match may be a passing mention rather than the job itself. Titles only.
4 roles across 5 listings · show every listing
33dStaff / Senior Staff Engineer - ASIC / NoC SoC deployment architect - Qualcomm - Guyancourt, France…advantage: • SoC high speed protocols and chiplet architectures • Coherency protocols Keywords • SoC, ASIC, Deployment, Solutions Architect, Interconnect, Cache, CPU, GPU, Coherency, debug, verification What…
- 38dSOC Design Verification Engineer– Pre-Si/Post-Si Verification
…cache coherency and interconnect fabrics, DDR/HBM memory subsystems, PCIe/CXL/Ethernet/high-speed interfaces, security, performance, and power-management features. · For Engineer level…
- 39dSOC Design Verification Engineer, Staff– Pre-Si/Post-Si Verification
…cache coherency and interconnect fabrics, DDR/HBM memory subsystems, PCIe/CXL/Ethernet/high-speed interfaces, security, performance, and power-management features. · For Engineer level…
- 53dSOC Design Verification Engineer – Data Center Solutions
…Multi-core CPU systems Cache coherency and interconnect fabrics DDR/HBM memory subsystems PCIe, CXL, Ethernet, and high-speed interfaces Security, RAS, and power…