…Memory NoCs based Subsystem Design Team is looking for a Senior ASIC Design Engineers for the next generation high speed HBM/LPDDR/DDR memory…

…in Electrical Engineering or equivalent - 5+ years of hardware design and validation of components, subsystems and systems experience - Experience in hardware design and validation…

…in Electrical Engineering or equivalent - 5+ years of hardware design and validation of components, subsystems and systems experience - Experience in hardware design and validation…

…DSP architectures and signal-processing pipelines CPU and GPU architectures AI/ML acceleration Packet processing and networking engines Memory hierarchy and DDR subsystems NoC…

…fabrics, DDR/HBM memory subsystems, PCIe/CXL/Ethernet/high-speed interfaces, security, performance, and power-management features. · For Engineer level: execute assigned verification tasks…

…memory subsystems, Cache hierarchies, and SoC integration flows Understanding of SoC architecture and Pre-Si Systems with a track record of enabling full verification…

…fabrics, DDR/HBM memory subsystems, PCIe/CXL/Ethernet/high-speed interfaces, security, performance, and power-management features. · For Engineer level: execute assigned verification tasks…

…Design, develop, and execute end-to-end validation solutions for critical SoC subsystems including DDR, CPU, PCIe, Storage, NoCs, Power Management, Clocking, GPU, Video…

…design-for-testability requirements and contributing to silicon architecture reviews from a validation perspective Familiarity with server systems architecture including PCIe topology, memory subsystems…

NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our GPU Memory Subsystem IP verification Team! At NVIDIA, we have crafted a…

…Experience with DDR4, Aurora, and high-speed transceiver design and verification. Familiarity with AXI Stream and AXI Memory Mapped interfaces. PCB design and schematic…

…development cycle. Verify complex Data Center SoC features including: Multi-core CPU systems Cache coherency and interconnect fabrics DDR/HBM memory subsystems PCIe, CXL…

…Secret security clearance PREFERRED QUALIFICATIONS Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication…

…Secret security clearance PREFERRED QUALIFICATIONS Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication…